Keysight (formerly Agilent T&M) 16910A Timing/State Logic Analysis Module

Timing Analysis (Asynchronous Sampling)

• 4 GHz (250 ps) timing zoom with 64 K memory
• 1.0 GHz / 500 MHz (half / full-channel) conventional timing analysis with deep memory
• 500 MHz transitional timing

State Analysis (Synchronous Sampling)

• State clock rates up to 450 MHz
• Data rates: up to 500 Mb/s
• Automated threshold/sample position setup for accurate measurements on high-speed buses
• Simultaneous eye diagrams on all channels identify problem signals quickly

Configuration Considerations

• 102-channels per module, combine up to 5 modules for 510 channels
• Selectable memory depths: 1 M, 4 M, 16 M, 32 M Memory Depth and State Speed Upgrade Options
• Compatible with 40-pin logic analyzer probes. Probes are ordered separately. Keysight’s Probe Recommendations
• Compatible with 16900 Series modular logic analyzers

Additional Capabilities

• Comprehensive single-ended signal support, threshold is adjustable from -5 V to 5 V (10 mV increments)